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author | yangcong <yangcong5@huaqin.corp-partner.google.com> | 2023-03-02 20:59:30 +0800 |
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committer | Rex-BC Chen <rex-bc.chen@mediatek.com> | 2023-03-07 11:08:14 +0000 |
commit | 6538464e2f404ff5fcf28c29f032fac0f1668b85 (patch) | |
tree | 0902b0a717ab5dbd507d185eb450ddcf99fc9c51 /src/lib/libgcc.c | |
parent | 1912a86d1d295e940d57345bf573969096176af6 (diff) |
mb/google/geralt: Set +-5.7V to TPS65132s EEPROM
It is necessary to increase the AVDD/AVEE of TPS65132s PMIC to +-5.7V
for powering on BOE_TV110C9M_LL0. So we set the default value to +-5.7V
and program the value to the EEPROM when configuring the display at the
first time. In this way, TPS65132s could load the correct setting from
the EEPROM after booting into kernel.
BUG=b:268292556
TEST=test firmware display pass and AVDD/AVEE is +-5.7V on Geralt.
Change-Id: I29236818444cac84d42386a371cd8934048ff948
Signed-off-by: yangcong <yangcong5@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73443
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Diffstat (limited to 'src/lib/libgcc.c')
0 files changed, 0 insertions, 0 deletions