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author | Felix Held <felix-coreboot@felixheld.de> | 2023-03-02 19:45:21 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-07 16:53:39 +0000 |
commit | f0c1c9791b2909e5d963d55b215485f66f1fc62e (patch) | |
tree | 9ec89e8a4392f9f83c31499301b17c5d72583815 /src/lib/hardwaremain.c | |
parent | 059370898cd7d4fdd21538c187a219ea72ad36ce (diff) |
soc/amd/stoneyridge: request binaryPI to use \_SB_ scope in PSTATE SSDT
Instead of having binaryPI generate a PSTATE SSDT that uses \_PR_ as the
scope for the CPU objects and patching this SSDT in coreboot to use the
\_SB_ scope in patch_ssdt_processor_scope, request binaryPI to use the
\_SB_ scope instead by setting the late platform configuration option
ProcessorScopeInSb to true.
TEST=Careena still boots and Linux doesn't show any ACPI errors with
this patch applied. With only patch_ssdt_processor_scope removed, but
the ProcessorScopeInSb option not set, Linux will complain that it can't
resolve the \PR.P00x symbols.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: If88820a0f5df923f129e2e3b5335f5f0e38ee7f5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73385
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/lib/hardwaremain.c')
0 files changed, 0 insertions, 0 deletions