summaryrefslogtreecommitdiff
path: root/src/lib/bootmode.c
diff options
context:
space:
mode:
authorLee Leahy <leroy.p.leahy@intel.com>2016-02-07 14:48:53 -0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2016-02-10 02:42:21 +0100
commit318ef96af346df886348f622f1cd711ade29011e (patch)
tree81944a02aa39f50d1f3a89f073ed433dd361ef2c /src/lib/bootmode.c
parentc285b30b7d78aead0b201ca721d6e4c653e424ba (diff)
soc/intel/quark: FSP MemoryInit Support
Add a dummy fill_power_state routine so that execution is able to reach FSP MemoryInit. Testing on Galileo: * Edit the src/mainboard/intel/galileo/Makefile.inc file * Add "select ADD_FSP_PDAT_FILE" * Add "select ADD_FSP_RAW_BIN" * Add "select ADD_RMU_FILE" * Add "select DISPLAY_HOBS" * Add "select DISPLAY_UPD_DATA" * Place the FSP.bin file in the location specified by CONFIG_FSP_FILE * Place the pdat.bin files in the location specified by CONFIG_FSP_PDAT_FILE * Place the rmu.bin file in the location specified by CONFIG_RMU_FILE * Testing is successful if: * MemoryInit returns 0 (success) and * The the message "ERROR - Coreboot's requirements not met by FSP binary!" is not displayed Change-Id: I2a116e1e769ac09915638aa9e5d7c58a4aac3cce Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/13447 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/lib/bootmode.c')
0 files changed, 0 insertions, 0 deletions