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authorSridhar Siricilla <sridhar.siricilla@intel.com>2023-02-06 12:39:01 +0530
committerFelix Held <felix-coreboot@felixheld.de>2023-02-10 15:53:43 +0000
commitebe7f7cee041ebc4e40de095c4d4f61472213b92 (patch)
tree05cd66c04215abe132b48adc43ee922a6a83797f /src/include
parente00705e0a01fcf183ef3005bec1a97401d6b56e1 (diff)
soc/intel/{common, meteorlake}: Add support for new MCH
The patch adds support for new Meteor Lake MCH (ID:0x7d16). TEST=Build and boot the system having MCH ID:0x7d16. Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Change-Id: Ib0c9ce5c58e4bdec5e7245840f0892d651922cd9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72835 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Usha P <usha.p@intel.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci_ids.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index cc1ba20611..d277389cf9 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -4123,6 +4123,7 @@
#define PCI_DID_INTEL_MTL_P_ID_2 0x7D02
#define PCI_DID_INTEL_MTL_P_ID_3 0x7d14
#define PCI_DID_INTEL_MTL_P_ID_4 0x7d15
+#define PCI_DID_INTEL_MTL_P_ID_5 0x7d16
#define PCI_DID_INTEL_RPL_P_ID_1 0xa706
#define PCI_DID_INTEL_RPL_P_ID_2 0xa707
#define PCI_DID_INTEL_RPL_P_ID_3 0xa708