diff options
| author | David Ruth <druth@chromium.org> | 2023-12-06 21:39:54 +0000 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-02-06 03:37:19 +0000 |
| commit | ea8330ed819c0d0b70ebfb0ab9eaf341fd683c11 (patch) | |
| tree | a6e762cc8856bda911d8d337a7ee8aaf358de831 /src/include | |
| parent | 7201602a18b63fc5236f025d22dc726637866cb6 (diff) | |
drivers/wifi: Add MTCL function to ACPI SSDT
The MTCL function provides a country list to the Linux kernel via an
ACPI function in SSDT for MediaTek WiFi chipsets that are capable of
operating on the 6GHz band. The country list is used to selectively
disable 6GHz and 5.9GHz operation based on the country the device is
operating in.
The function needs to read a binary file and send it as a package via
the MTCL method in SSDT for PCIe WiFi with MediaTek chipsets.
Change Summary:
* Add src/drivers/wifi/generic/mtcl.c to abstract functionaltity related
to MTCL
* Add write_mtcl_aml function to convert the byte data into the format
expected by the MTCL functionality in the Linux kernel.
* Add validate_mtcl function to validate that the byte data read in
from a file is in the expected format.
* Add write_mtcl_function function to read a binary file called
"wifi_mtcl".bin" from cbfs, then call validate_mtcl to verify that
it is in an expected format, and if so write the aml via acpigen
* Add config flag DRIVERS_MTK_WIFI to src/drivers/wifi/generic in order
to include MediaTek WiFi specific functionality
* Add config flag USE_MTCL which depends on DRIVERS_MTK_WIFI and
enables including the specific ACPI function defined in SSDT
* Add config flag CONFIG_MTCL_CBFS_FILEPATH which depends on
DRIVERS_MTK_WIFI which enables configuring the file to add as
"wifi_mtcl.bin"
* Add a call to write_mtcl_function to src/drivers/wifi/generic/acpi.c
to include the MTCL function in SSDT for MTK WiFi devices when
USE_MTCL is enabled.
* Add MediaTek VID to src/include/device/pci_ids.h.
BUG=b:295544553
TEST=Add Kconfig entry USE_MTCL for pujjo
TEST=Add wifi_mtcl_defaults.bin blob to cbfs
TEST=Build coreboot for pujjo `emerge-nissa coreboot chromeos-bootimage`
TEST=Verify that MTCL defined in the file is present:
TEST=`acpidump -b`
TEST=`iasl ssdt.dat`
TEST=`less ssdt.dsl`
TEST=Search for MTCL
Signed-off-by: David Ruth <druth@chromium.org>
Change-Id: I9b5e7312a44e114270e664b983626faa6cfee350
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80170
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/device/pci_ids.h | 2 | ||||
| -rw-r--r-- | src/include/mtcl.h | 8 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 50285b9705..d2f429c9f3 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -4857,6 +4857,8 @@ #define PCI_DID_SIS_SIS968_PCIE 0x000a /* D6F0,D7F0 */ #define PCI_DID_SIS_SIS968_HD_AUDIO 0x7502 /* DfF0 */ +#define PCI_VID_MEDIATEK 0x14c3 + /* OLD USAGE FOR COREBOOT */ #define PCI_VID_ACER 0x10b9 #define PCI_DID_ACER_M1535D 0x1533 diff --git a/src/include/mtcl.h b/src/include/mtcl.h new file mode 100644 index 0000000000..593c09c7b6 --- /dev/null +++ b/src/include/mtcl.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _MTCL_H_ +#define _MTCL_H_ + +void write_mtcl_function(void); + +#endif /* _MTCL_H_ */ |