diff options
| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2022-04-25 14:59:17 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-17 14:27:12 +0000 |
| commit | c8c75fabb30513cfe3100afbe43c5ee56a006edb (patch) | |
| tree | 64e44f125feb41547d8a1ffc8b157044d5715866 /src/include | |
| parent | 1205345227872d9ed148883a2352924dfecd41fb (diff) | |
soc/intel/alderlake/report_platform.c: Add ADL-S identification
Based on DOC #619501, #619362 and #618427
TEST=Boot MSI PRO Z690-A DDR4 WIFI and see the silicon info is
reported as ADL-S.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I8051113515ef63fc4687f53d25140a3f55aadb6e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63838
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/cpu/intel/cpu_ids.h | 4 | ||||
| -rw-r--r-- | src/include/device/pci_ids.h | 15 |
2 files changed, 19 insertions, 0 deletions
diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h index 384b000a4e..d8191331d9 100644 --- a/src/include/cpu/intel/cpu_ids.h +++ b/src/include/cpu/intel/cpu_ids.h @@ -51,6 +51,10 @@ #define CPUID_ELKHARTLAKE_A0 0x90660 #define CPUID_ELKHARTLAKE_B0 0x90661 #define CPUID_ALDERLAKE_S_A0 0x90670 +#define CPUID_ALDERLAKE_S_B0 0x90671 +#define CPUID_ALDERLAKE_S_C0 0x90672 +#define CPUID_ALDERLAKE_S_G0 0x90674 +#define CPUID_ALDERLAKE_S_H0 0x90675 #define CPUID_ALDERLAKE_J0 0x906a0 #define CPUID_ALDERLAKE_Q0 0x906a1 #define CPUID_ALDERLAKE_K0 0x906a2 diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index b34158fe49..fc36cbce37 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3040,6 +3040,17 @@ #define PCI_DID_INTEL_ADP_S_ESPI_29 0x7a9d #define PCI_DID_INTEL_ADP_S_ESPI_30 0x7a9e #define PCI_DID_INTEL_ADP_S_ESPI_31 0x7a9f +#define PCI_DID_INTEL_ADP_S_H610 0x7a87 +#define PCI_DID_INTEL_ADP_S_B660 0x7a86 +#define PCI_DID_INTEL_ADP_S_H670 0x7a85 +#define PCI_DID_INTEL_ADP_S_Q670 0x7a83 +#define PCI_DID_INTEL_ADP_S_Z690 0x7a84 +#define PCI_DID_INTEL_ADP_S_W680 0x7a88 +#define PCI_DID_INTEL_ADP_S_W685 0x7a8a +#define PCI_DID_INTEL_ADP_S_WM690 0x7a8d +#define PCI_DID_INTEL_ADP_S_HM670 0x7a8c +#define PCI_DID_INTEL_ADP_S_WM790 0x7a0d +#define PCI_DID_INTEL_ADP_S_HM770 0x7a0c #define PCI_DID_INTEL_ADP_M_N_ESPI_0 0x5480 #define PCI_DID_INTEL_ADP_M_N_ESPI_1 0x5481 #define PCI_DID_INTEL_ADP_M_N_ESPI_2 0x5482 @@ -3986,6 +3997,10 @@ #define PCI_DID_INTEL_ADL_P_GT2_8 0x46b1 #define PCI_DID_INTEL_ADL_P_GT2_9 0x4626 #define PCI_DID_INTEL_ADL_S_GT1 0x4680 +#define PCI_DID_INTEL_ADL_S_GT1_1 0x4682 +#define PCI_DID_INTEL_ADL_S_GT2 0x4690 +#define PCI_DID_INTEL_ADL_S_GT2_1 0x4692 +#define PCI_DID_INTEL_ADL_S_GT2_2 0x4693 #define PCI_DID_INTEL_ADL_M_GT1 0x46c0 #define PCI_DID_INTEL_ADL_M_GT2 0x46aa #define PCI_DID_INTEL_ADL_M_GT3 0x46c3 |