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authorTarun Tuli <taruntuli@google.com>2022-05-03 20:35:47 +0000
committerTim Wawrzynczak <twawrzynczak@chromium.org>2022-05-12 19:44:38 +0000
commitc66ea98577681f6eded53ca56a7ba945d2a18e31 (patch)
treed3bbed7b628eda32335d0178e99242c1647076b0 /src/include
parentda958d679d41a84103ea7b068a84255ee31d13f7 (diff)
soc/intel/alderlake: provide a list of D-states to enter LPM
Implement sub-function 1 (Get Device Constraints) of the Low Power S0 Idle Device-Specific Method (_DSM). This provides a way in which to describe various devices required D-states to enter LPM (S0ix). The information can be used to help in diagnostics and understanding of S0ix entry failure. Values were derived from Intel document 595644 (rev 0.45) and the ADL FSP sample ASL. This implementation adds support for ADL. Other SoC's could be ported to be included as well. If they aren't, they will default to the existing behavior of a single hardcoded device to ensure compatibility with Windows. TEST=Built and tested on brya by verifying SSDT contents Change-Id: Ibe46a0583c522a8adf0a015cd3a698f694482437 Signed-off-by: Tarun Tuli <taruntuli@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63969 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Lance Zhao
Diffstat (limited to 'src/include')
-rw-r--r--src/include/acpi/acpi.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h
index dbd5c38f8b..ad91fbd25c 100644
--- a/src/include/acpi/acpi.h
+++ b/src/include/acpi/acpi.h
@@ -1234,6 +1234,8 @@ void acpi_create_ssdt_generator(acpi_header_t *ssdt, const char *oem_table_id);
void acpi_write_bert(acpi_bert_t *bert, uintptr_t region, size_t length);
void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt);
+void soc_lpi_get_constraints(void *unused);
+
void acpi_fill_fadt(acpi_fadt_t *fadt);
void arch_fill_fadt(acpi_fadt_t *fadt);
void soc_fill_fadt(acpi_fadt_t *fadt);