diff options
| author | Bora Guvendik <bora.guvendik@intel.com> | 2022-02-28 14:43:49 -0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-16 13:12:05 +0000 |
| commit | a15b25f6fd3b121913508bf6b603856d5026be2c (patch) | |
| tree | 937af3198d16eee54e5d9284855aca312ce077e6 /src/include | |
| parent | 7e3159c3d2ee0d1aa51aac57fbeb34ffc08255e7 (diff) | |
soc/intel: Add Raptor Lake device IDs
Add Raptor Lake specific CPU, System Agent, PCH, IGD device IDs.
References:
RaptorLake External Design Specification Volume 1 (640555)
600/700 Series PCH External Design Specification Volume 1 (626817)
Change-Id: I39e655dec2314a672ea63ba90d8bb3fc53bf77ba
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63750
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Anil Kumar K <anil.kumar.k@intel.com>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/cpu/intel/cpu_ids.h | 2 | ||||
| -rw-r--r-- | src/include/device/pci_ids.h | 59 |
2 files changed, 58 insertions, 3 deletions
diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h index 6d3685194f..384b000a4e 100644 --- a/src/include/cpu/intel/cpu_ids.h +++ b/src/include/cpu/intel/cpu_ids.h @@ -59,4 +59,6 @@ #define CPUID_ALDERLAKE_N_A0 0xb06e0 #define CPUID_METEORLAKE_A0_1 0xa06a0 #define CPUID_METEORLAKE_A0_2 0xa06a1 +#define CPUID_RAPTORLAKE_P_J0 0xb06a2 + #endif /* CPU_INTEL_CPU_IDS_H */ diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 7c460f9052..317698633d 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3008,8 +3008,6 @@ #define PCI_DID_INTEL_ADP_P_ESPI_29 0x7a1d #define PCI_DID_INTEL_ADP_P_ESPI_30 0x7a1e #define PCI_DID_INTEL_ADP_P_ESPI_31 0x7a1f -#define PCI_DID_INTEL_ADP_P_ESPI_32 0x5181 -#define PCI_DID_INTEL_ADP_P_ESPI_33 0x5182 #define PCI_DID_INTEL_ADP_S_ESPI_0 0x7a80 #define PCI_DID_INTEL_ADP_S_ESPI_1 0x7a81 #define PCI_DID_INTEL_ADP_S_ESPI_2 0x7a82 @@ -3074,7 +3072,6 @@ #define PCI_DID_INTEL_ADP_M_N_ESPI_29 0x549d #define PCI_DID_INTEL_ADP_M_N_ESPI_30 0x549e #define PCI_DID_INTEL_ADP_M_N_ESPI_31 0x549f -#define PCI_DID_INTEL_ADP_M_ESPI_32 0x5186 #define PCI_DID_INTEL_SPR_ESPI_1 0x1b80 #define PCI_DID_INTEL_MTL_ESPI_0 0x7e00 #define PCI_DID_INTEL_MTL_ESPI_1 0x7e01 @@ -3084,6 +3081,38 @@ #define PCI_DID_INTEL_MTL_ESPI_5 0x7e05 #define PCI_DID_INTEL_MTL_ESPI_6 0x7e06 #define PCI_DID_INTEL_MTL_ESPI_7 0x7e07 +#define PCI_DID_INTEL_RPP_P_ESPI_0 0x5180 +#define PCI_DID_INTEL_RPP_P_ADP_P_ESPI_1 0x5181 +#define PCI_DID_INTEL_RPP_P_ADP_P_ESPI_2 0x5182 +#define PCI_DID_INTEL_RPP_P_ESPI_3 0x5183 +#define PCI_DID_INTEL_RPP_P_ESPI_4 0x5184 +#define PCI_DID_INTEL_RPP_P_ESPI_5 0x5185 +#define PCI_DID_INTEL_RPP_P_ADP_M_ESPI_6 0x5186 +#define PCI_DID_INTEL_RPP_P_ESPI_7 0x5187 +#define PCI_DID_INTEL_RPP_P_ESPI_8 0x5188 +#define PCI_DID_INTEL_RPP_P_ESPI_9 0x5189 +#define PCI_DID_INTEL_RPP_P_ESPI_10 0x518a +#define PCI_DID_INTEL_RPP_P_ESPI_11 0x518b +#define PCI_DID_INTEL_RPP_P_ESPI_12 0x518c +#define PCI_DID_INTEL_RPP_P_ESPI_13 0x518d +#define PCI_DID_INTEL_RPP_P_ESPI_14 0x518e +#define PCI_DID_INTEL_RPP_P_ESPI_15 0x518f +#define PCI_DID_INTEL_RPP_P_ESPI_16 0x5190 +#define PCI_DID_INTEL_RPP_P_ESPI_17 0x5191 +#define PCI_DID_INTEL_RPP_P_ESPI_18 0x5192 +#define PCI_DID_INTEL_RPP_P_ESPI_19 0x5193 +#define PCI_DID_INTEL_RPP_P_ESPI_20 0x5194 +#define PCI_DID_INTEL_RPP_P_ESPI_21 0x5195 +#define PCI_DID_INTEL_RPP_P_ESPI_22 0x5196 +#define PCI_DID_INTEL_RPP_P_ESPI_23 0x5197 +#define PCI_DID_INTEL_RPP_P_ESPI_24 0x5198 +#define PCI_DID_INTEL_RPP_P_ESPI_25 0x5199 +#define PCI_DID_INTEL_RPP_P_ESPI_26 0x519a +#define PCI_DID_INTEL_RPP_P_ESPI_27 0x519b +#define PCI_DID_INTEL_RPP_P_ESPI_28 0x519c +#define PCI_DID_INTEL_RPP_P_ESPI_29 0x519d +#define PCI_DID_INTEL_RPP_P_ESPI_30 0x519e +#define PCI_DID_INTEL_RPP_P_ESPI_31 0x519f /* Intel PCIE device ids */ #define PCI_DID_INTEL_LPT_H_PCIE_RP1 0x8c10 @@ -3434,6 +3463,10 @@ #define PCI_DID_INTEL_MTL_IOE_P_PCIE_RP11 0x7ecb #define PCI_DID_INTEL_MTL_IOE_P_PCIE_RP12 0x7ecc +#define PCI_DID_INTEL_RPL_P_PCIE_RP1 0xa74d +#define PCI_DID_INTEL_RPL_P_PCIE_RP2 0xa70d +#define PCI_DID_INTEL_RPL_P_PCIE_RP3 0xa72d + /* Intel SATA device Ids */ #define PCI_DID_INTEL_LPT_H_DESKTOP_SATA_IDE 0x8c00 #define PCI_DID_INTEL_LPT_H_DESKTOP_SATA_AHCI 0x8c02 @@ -3506,6 +3539,8 @@ #define PCI_DID_INTEL_ADP_M_SATA_2 0x54d7 #define PCI_DID_INTEL_ADP_M_SATA_3 0x282a #define PCI_DID_INTEL_MTL_SATA 0x7e63 +#define PCI_DID_INTEL_RPP_P_SATA_1 0x51d3 +#define PCI_DID_INTEL_RPP_P_SATA_2 0x51d7 /* Intel PMC device Ids */ #define PCI_DID_INTEL_SPT_LP_PMC 0x9d21 @@ -3530,6 +3565,7 @@ #define PCI_DID_INTEL_MTL_SOC_PMC 0x7e21 #define PCI_DID_INTEL_MTL_IOE_M_PMC 0x7ebe #define PCI_DID_INTEL_MTL_IOE_P_PMC 0x7ece +#define PCI_DID_INTEL_RPP_P_PMC 0x51a1 /* Intel I2C device Ids */ #define PCI_DID_INTEL_LPT_LP_I2C0 0x9c61 @@ -3959,6 +3995,9 @@ #define PCI_DID_INTEL_MTL_M_GT2 0x7d40 #define PCI_DID_INTEL_MTL_P_GT2_1 0x7d50 #define PCI_DID_INTEL_MTL_P_GT2_2 0x7d60 +#define PCI_DID_INTEL_RPL_P_GT1 0xa720 +#define PCI_DID_INTEL_RPL_P_GT2 0xa7a8 +#define PCI_DID_INTEL_RPL_P_GT3 0xa7a0 /* Intel Northbridge Ids */ @@ -4079,6 +4118,8 @@ #define PCI_DID_INTEL_MTL_M_ID 0x7D00 #define PCI_DID_INTEL_MTL_P_ID_1 0x7D01 #define PCI_DID_INTEL_MTL_P_ID_2 0x7D02 +#define PCI_DID_INTEL_RPL_P_ID_1 0xa706 +#define PCI_DID_INTEL_RPL_P_ID_2 0xa707 /* Intel SMBUS device Ids */ #define PCI_DID_INTEL_LPT_H_SMBUS 0x8c22 @@ -4102,6 +4143,7 @@ #define PCI_DID_INTEL_ADP_S_SMBUS 0x7aa3 #define PCI_DID_INTEL_ADP_M_N_SMBUS 0x54a3 #define PCI_DID_INTEL_MTL_SMBUS 0x7e22 +#define PCI_DID_INTEL_RPP_P_SMBUS 0x51a3 /* Intel EHCI device IDs */ #define PCI_DID_INTEL_LPT_H_EHCI_1 0x8c26 @@ -4137,6 +4179,7 @@ #define PCI_DID_INTEL_MTL_XHCI 0x7e7d #define PCI_DID_INTEL_MTL_M_TCSS_XHCI 0x7eb0 #define PCI_DID_INTEL_MTL_P_TCSS_XHCI 0x7ec0 +#define PCI_DID_INTEL_RPP_P_TCSS_XHCI 0xa71e /* Intel P2SB device Ids */ #define PCI_DID_INTEL_APL_P2SB 0x5a92 @@ -4161,6 +4204,7 @@ #define PCI_DID_INTEL_MTL_SOC_P2SB 0x7e20 #define PCI_DID_INTEL_MTL_IOE_M_P2SB 0x7eb8 #define PCI_DID_INTEL_MTL_IOE_P_P2SB 0x7ec8 +#define PCI_DID_INTEL_RPP_P_P2SB 0x51a0 /* Intel SRAM device Ids */ #define PCI_DID_INTEL_APL_SRAM 0x5aec @@ -4206,6 +4250,7 @@ #define PCI_DID_INTEL_ADP_S_AUDIO_7 0x7ad6 #define PCI_DID_INTEL_ADP_S_AUDIO_8 0x7ad7 #define PCI_DID_INTEL_ADP_P_AUDIO 0x51c8 +#define PCI_DID_INTEL_RPP_P_AUDIO 0x51ca #define PCI_DID_INTEL_ADP_M_N_AUDIO_1 0x54c8 #define PCI_DID_INTEL_ADP_M_N_AUDIO_2 0x54c9 @@ -4337,6 +4382,11 @@ #define PCI_DID_INTEL_MTL_M_TBT_DMA0 0x7eb2 #define PCI_DID_INTEL_MTL_P_TBT_DMA0 0x7ec2 #define PCI_DID_INTEL_MTL_P_TBT_DMA1 0x7ec3 +#define PCI_DID_INTEL_RPL_TBT_RP0 0xa76e +#define PCI_DID_INTEL_RPL_TBT_RP1 0xa73f +#define PCI_DID_INTEL_RPL_TBT_RP2 0xa72f +#define PCI_DID_INTEL_RPL_TBT_DMA0 0xa73e +#define PCI_DID_INTEL_RPL_TBT_DMA1 0xa76d /* Intel WIFI Ids */ #define PCI_DID_1000_SERIES_WIFI 0x0084 @@ -4376,6 +4426,7 @@ #define PCI_DID_INTEL_ADL_IPU 0x465d #define PCI_DID_INTEL_ADL_N_IPU 0x462e #define PCI_DID_INTEL_MTL_IPU 0x7d19 +#define PCI_DID_INTEL_RPL_IPU 0xa75d /* Intel Dynamic Tuning Technology Device */ #define PCI_DID_INTEL_CML_DTT 0x1903 @@ -4383,6 +4434,7 @@ #define PCI_DID_INTEL_JSL_DTT 0x4E03 #define PCI_DID_INTEL_ADL_DTT 0x461d #define PCI_DID_INTEL_MTL_DTT 0x7d03 +#define PCI_DID_INTEL_RPL_DTT 0xa71d /* Intel CNVi WiFi/BT device IDs */ #define PCI_DID_INTEL_CML_LP_CNVI_WIFI 0x02f0 @@ -4427,6 +4479,7 @@ #define PCI_DID_INTEL_ADP_N_PMC_CRASHLOG_SRAM 0x54ef #define PCI_DID_INTEL_TGP_PMC_CRASHLOG_SRAM 0xa0ef #define PCI_DID_INTEL_MTL_CRASHLOG_SRAM 0x7d0d +#define PCI_DID_INTEL_RPL_CPU_CRASHLOG_SRAM 0xa77d #define PCI_VID_COMPUTONE 0x8e0e #define PCI_DID_COMPUTONE_IP2EX 0x0291 |