diff options
author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2016-01-05 17:00:27 -0800 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2016-02-03 03:32:58 +0100 |
commit | 420caafee8455bd5df5be254594f1b280c3921c4 (patch) | |
tree | f076294134ff091a741aea72093cb776277855ff /src/include | |
parent | 0cd9ff8987f9d4f303e01aefe9bfc812916fee04 (diff) |
include/device: Move inline functions from pci_def.h to pci.h
pci_def.h is supposed to only contain definitions, such that it may be
included in assembly files. Declaration of functions in said file
prevents that.
Change-Id: I0f90a74291c8a2ef7a1e1027d2d2182f896050fb
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: https://review.coreboot.org/13300
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include')
-rw-r--r-- | src/include/device/pci.h | 7 | ||||
-rw-r--r-- | src/include/device/pci_def.h | 7 |
2 files changed, 7 insertions, 7 deletions
diff --git a/src/include/device/pci.h b/src/include/device/pci.h index fe31b54f2f..9ef36148bb 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -119,6 +119,13 @@ unsigned pci_find_capability(device_t dev, unsigned cap); void pci_early_bridge_init(void); int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base); +#ifndef __ROMCC__ +static inline int pci_base_address_is_memory_space(unsigned int attr) +{ + return (attr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY; +} +#endif + #endif /* CONFIG_PCI */ #endif /* PCI_H */ diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h index 04cf945527..ef3427b4e7 100644 --- a/src/include/device/pci_def.h +++ b/src/include/device/pci_def.h @@ -78,13 +78,6 @@ #define PCI_BASE_ADDRESS_IO_ATTR_MASK 0x03 /* bit 1 is reserved if address_space = 1 */ -#ifndef __ROMCC__ -static inline int pci_base_address_is_memory_space(unsigned int attr) -{ - return (attr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY; -} -#endif - /* Header type 0 (normal devices) */ #define PCI_CARDBUS_CIS 0x28 #define PCI_SUBSYSTEM_VENDOR_ID 0x2c |