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authorMichael Niewöhner <foss@mniewoehner.de>2020-12-21 03:46:58 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2021-03-12 08:48:03 +0000
commit405f2296892c10a48db50cd66c2eb364cde0806e (patch)
tree407fdc4b2df309129ff377912560ffc371a36166 /src/include
parent2b5892256c734634f1fcbfb1a31bab979f271c22 (diff)
soc/intel/*: drop UART pad configuration from common code
UART pad configuration should not be done in common code, because that may cause short circuits, when the user sets a wrong UART index. Since all boards do pad setup on their own now, finally drop the pad configuration from SoC common code. Change-Id: Id03719eb8bd0414083148471ed05dea62a895126 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48829 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lance Zhao
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/pci_type.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/include/device/pci_type.h b/src/include/device/pci_type.h
index 713016b547..267f950864 100644
--- a/src/include/device/pci_type.h
+++ b/src/include/device/pci_type.h
@@ -16,7 +16,8 @@ typedef u32 pci_devfn_t;
(((DEV) & 0x1F) << 15) | \
(((FN) & 0x07) << 12))
-#define PCI_DEV_INVALID (0xffffffffU)
+#define PCI_DEV_INVALID (0xffffffffU)
+#define PCI_DEVFN_INVALID (0xffffffffU)
#if 1
/* FIXME: For most of the time in ramstage, we get valid device pointer