diff options
| author | Kane Chen <kane.chen@intel.com> | 2022-01-28 13:58:21 +0800 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-01-31 04:39:13 +0000 |
| commit | 3f8bff7764a564b839b139aabca6086f40d1a7af (patch) | |
| tree | dc1db9d23a10777b527d3d2987c97102473c4610 /src/include | |
| parent | 38c731413703bee1a773dccd7253ca186a4c5997 (diff) | |
soc/intel/alderlake: Add Alder Lake P IGD device IDs
This patch adds additional IGD device IDs as per document 638514.
BUG=b:216420554
TEST=coreboot is able to probe the IGD device during PCI enumeration.
Change-Id: I0cafe92581c454da5e4aeafd7ad52f0e65370b11
Signed-off-by: Kane Chen <kane.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61441
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/device/pci_ids.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 22962c3885..6b53bb06b5 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3902,6 +3902,9 @@ #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_4 0x46a8 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_5 0x46b3 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_6 0x46a6 +#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_7 0x4628 +#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_8 0x46b1 +#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_9 0x4626 #define PCI_DEVICE_ID_INTEL_ADL_S_GT1 0x4680 #define PCI_DEVICE_ID_INTEL_ADL_M_GT1 0x46c0 #define PCI_DEVICE_ID_INTEL_ADL_M_GT2 0x46aa |