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authorKyösti Mälkki <kyosti.malkki@gmail.com>2015-02-23 06:58:26 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-06-04 11:20:49 +0200
commit334524045339fc49247bdea1d4ebfd2ff46c9eb6 (patch)
tree5db6e79bbc622568041a6922c1d6389540cd2eef /src/include
parent6f37017c57db271beef5dd8f9f9d1229a1f99219 (diff)
PCI subsystem: Refactor PCI bridge register control
Change-Id: I1766c92abe7a74326c49df74ba38930a502fcb5b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8536 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/include')
-rw-r--r--src/include/device/device.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/device.h b/src/include/device/device.h
index d9fc663ccb..aec1af5279 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -81,6 +81,7 @@ struct bus {
ROMSTAGE_CONST struct device * children; /* devices behind this bridge */
ROMSTAGE_CONST struct bus *next; /* The next bridge on this device */
unsigned bridge_ctrl; /* Bridge control register */
+ uint16_t bridge_cmd; /* Bridge command register */
unsigned char link_num; /* The index of this link */
uint16_t secondary; /* secondary bus number */
uint16_t subordinate; /* max subordinate bus number */