From 334524045339fc49247bdea1d4ebfd2ff46c9eb6 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Mon, 23 Feb 2015 06:58:26 +0200 Subject: PCI subsystem: Refactor PCI bridge register control MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I1766c92abe7a74326c49df74ba38930a502fcb5b Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/8536 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson Reviewed-by: Patrick Georgi --- src/include/device/device.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/include') diff --git a/src/include/device/device.h b/src/include/device/device.h index d9fc663ccb..aec1af5279 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -81,6 +81,7 @@ struct bus { ROMSTAGE_CONST struct device * children; /* devices behind this bridge */ ROMSTAGE_CONST struct bus *next; /* The next bridge on this device */ unsigned bridge_ctrl; /* Bridge control register */ + uint16_t bridge_cmd; /* Bridge command register */ unsigned char link_num; /* The index of this link */ uint16_t secondary; /* secondary bus number */ uint16_t subordinate; /* max subordinate bus number */ -- cgit v1.2.3