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authorMarc Jones <marcjones@sysproconsulting.com>2021-01-21 10:53:47 -0700
committerMarc Jones <marc@marcjonesconsulting.com>2021-03-09 16:50:25 +0000
commit81ef9c21da5e794db63ed174f334669c8c3cbd56 (patch)
tree2279a7c693d1eae04ba485ce0fab05e7e84ad7e9 /src/include/timer.h
parentbab0544200403c944045237329187fda9406da2a (diff)
soc/intel/xeon_sp: Add PCH lockdown
Add SOC_INTEL_COMMON_PCH_LOCKDOWN and PMC_GLOBAL_RESET_ENABLE_LOCK to meet device security requirements. LOCKDOWN has dependencies on SOC_INTEL_COMMON_PCH_BASE and several other common block devices. Add COMMON_PCH_BASE and COMMON_PCH_SERVER to pick up LOCKDOWN and the dependencies. COMMON_PCH_SERVER adds the following common devices that were not previously included by XEON_SP: SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG SOC_INTEL_COMMON_BLOCK_CSE SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG SOC_INTEL_COMMON_BLOCK_ITSS SOC_INTEL_COMMON_PCH_LOCKDOWN SOC_INTEL_COMMON_BLOCK_SATA SOC_INTEL_COMMON_BLOCK_SMBUS SOC_INTEL_COMMON_BLOCK_XHCI Change-Id: Iab97123e487f4f13f874f364a9c51723d234d4f0 Signed-off-by: Marc Jones <marcjones@sysproconsulting.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49849 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/include/timer.h')
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