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| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2022-06-30 18:19:27 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-04 14:08:24 +0000 |
| commit | 97074645b35f0a3ae229e140ad42df584736905f (patch) | |
| tree | 0ddbee433625320804d5861a96916723ba245202 /src/include/spi_flash.h | |
| parent | 073779b5efc8c055185962cc55fabbed5433fba0 (diff) | |
soc/intel/alderlake/fsp_params.c: Handle CnviWifiCore parameter
Platform with public FSP hooked-up have an additional parameter
to control CNVi WiFi with CnviWifiCore UPD.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I19efb645fbe1530a571c92d0573c1c60ff6605a0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65568
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/include/spi_flash.h')
0 files changed, 0 insertions, 0 deletions