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author | Angel Pons <th3fanbus@gmail.com> | 2020-07-12 23:06:47 +0200 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-20 13:18:56 +0000 |
commit | 2e5e99c48ce374e8ad1d92a77e54c5e22a770f0b (patch) | |
tree | 85a8798de8617f92c83fbcfe167a22d468c9800e /src/include/spd_ddr2.h | |
parent | 7db5ce15a3fd8a90cc3bc6c08526358257892cb3 (diff) |
sb/intel/i82801dx: Declare reset register in FADT
According to Intel Document 290744 (ICH4 datasheet), 0xcf9 is the reset
register, and setting bits 1 and 2 will result in a hard reset.
Change-Id: Id1a532857d9643d222d61c3902faadd471ae2a9a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43384
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/include/spd_ddr2.h')
0 files changed, 0 insertions, 0 deletions