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| author | Yidi Lin <yidilin@chromium.org> | 2024-05-29 17:21:30 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-08-10 01:10:20 +0000 |
| commit | db5dbdf310bca698acaa4ce945692ef59147aca4 (patch) | |
| tree | 5d1194ff007e0de747109e3329d457bedc41233b /src/include/spd_cache.h | |
| parent | b60cfb89e99bd2c6a7136b99385eb1fbe5b8e85d (diff) | |
soc/mediatek/common: Refactor EINT driver
Refactor EINT driver by
- Move `pos_bit_calc_for_eint` to `common/gpio_eint_v1.c` and rename to
`gpio_calc_eint_pos_bit`.
- Implement `gpio_get_eint_reg` to obtain EINT base address.
This change is prepared for the driver change in MT8196.
BUG=b:334723688
TEST=EINT works on Geralt
Change-Id: Ie53abc23971bfa39250ebd7dd48e28d6b91c5973
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83703
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/spd_cache.h')
0 files changed, 0 insertions, 0 deletions