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authorV Sowmya <v.sowmya@intel.com>2021-02-23 13:31:34 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-03-12 04:26:39 +0000
commit8cb7af8e7c139afd982cea54e579870ee089e4c7 (patch)
treecca2a57e66f40cb9a05f5b19b5b53ea9fcb265cc /src/include/rtc.h
parent03a4bfc54d6a467da1ba89ddc9e68e6637f90938 (diff)
mb/intel/shadowmountain: Enable Type-C subsystem
This patch adds the changes to enable the TCSS. BUG=b:175808146 TEST= Boot shadowmountain board, Test the functionality of the Type-C ports on both the mainboard and daughterboard by plugging in the Type-C devices and verified the devices are detected via EC console and in the OS. Signed-off-by: V Sowmya <v.sowmya@intel.com> Change-Id: Ieaf1170ca718a14d24b773a4a85516e0bbfbb569 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51026 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/rtc.h')
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