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authorArthur Heymans <arthur@aheymans.xyz>2019-10-03 09:16:10 +0200
committerArthur Heymans <arthur@aheymans.xyz>2019-10-06 10:15:16 +0000
commit3b452e0a797b54a05b97725f4e4e320c51098754 (patch)
tree6cebd0c98dd87522f32a6179051673ae2225e17c /src/include/rtc.h
parentcea4fd9bb059dab2a0c10b48b1c645807665eec2 (diff)
nb/intel/nehalem: Move PCH init to sb/intel/ibexpeak
This change does the following: - Move PCH init code from the common romstage to sb code, this allows for easier reuse in bootblock - Provide a common minimal LPC io decode setup, mainboards can override this in the mainboard_lpc_init if required - Set up LPC generic IO decode up in romstage based on devicetree settings - Remove the ramstage LPC generic IO decode from ramstage as this is now done in romstage.c - Get rid of unneeded setup of spi_read configuration in BIOS_CNTL as this is already done in the bootblock. Change-Id: I3f448ad1fdc445c4c1fedbc8497e1025af111412 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35772 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/include/rtc.h')
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