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authorChen, Yuchi <yuchi.chen@intel.com>2024-06-24 16:52:12 +0800
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2024-08-06 16:46:50 +0000
commit377b13335914c5d3a23ddfb8a8b600cd1f260ea9 (patch)
treeda6b794efd42265fcc50c3d57b28fa5830695f6d /src/include/rtc.h
parent7b12f93ad5602a95f38a77e15c2a2c6f02bae11e (diff)
vc/intel/fsp/fsp2_0/snowridge: Add FSP headers for Snow Ridge SoC
Change-Id: I333b137c1dc08a3c06bdd3f7a78ca44a5dd043cc Signed-off-by: Yuchi Chen <yuchi.chen@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83192 Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shuo Liu <shuo.liu@intel.com> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
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