summaryrefslogtreecommitdiff
path: root/src/include/device
diff options
context:
space:
mode:
authorBen Chuang <benchuanggli@gmail.com>2021-11-18 16:33:05 +0800
committerPatrick Georgi <patrick@coreboot.org>2021-11-23 09:19:25 +0000
commite987845fefe76b1a11071fe9cf10862f18dfac7b (patch)
tree4cecdf7d58798abd821087aa72d5bef4d7e116ae /src/include/device
parentea6a93f14087a72c84c480e67b54cda8b6766930 (diff)
drivers/genesyslogic/gl9750: Add driver for Genesys Logic GL9750
The device is a PCIe Gen1 to SD 3.0 card reader controller to be used in the Chromebook. The datasheet name is GL9750S and the revision is 01. The patch disables ASPM L0s. BUG=b:206014046 TEST=Verify GL9750 enters L1 by observing CLKREQ# de-asserts. Signed-off-by: Ben Chuang <benchuanggli@gmail.com> Change-Id: I6d60cef41baade7457a159d3ce2f8d2e6b66e71c Reviewed-on: https://review.coreboot.org/c/coreboot/+/59429 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/include/device')
-rw-r--r--src/include/device/pci_ids.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index c6ef12188f..fc82c268ec 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -2064,8 +2064,9 @@
#define PCI_DEVICE_ID_ALTIMA_AC9100 0x03ea
#define PCI_VENDOR_ID_GLI 0x17a0
-#define PCI_DEVICE_ID_GLI_9763E 0xe763
+#define PCI_DEVICE_ID_GLI_9750 0x9750
#define PCI_DEVICE_ID_GLI_9755 0x9755
+#define PCI_DEVICE_ID_GLI_9763E 0xe763
#define PCI_VENDOR_ID_XGI 0x18ca
#define PCI_DEVICE_ID_XGI_20 0x0020