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authorStefan Reinauer <reinauer@chromium.org>2012-07-31 16:47:25 -0700
committerRonald G. Minnich <rminnich@gmail.com>2012-08-04 18:05:39 +0200
commit57879c9bd1775ad7089e3ab93dd260deec87e95c (patch)
tree062977c18247febf8b11f6610af7df3ef34ba3d2 /src/include/device
parent15dc3ccaab5a431b1a0b99aaba9d61457b219343 (diff)
Make the device tree available in the rom stage
We thought about two ways to do this change. The way we decided to try was to 1. drop all ops from devices in romstage 2. constify all devices in romstage (make them read-only) so we can compile static.c into romstage 3. the device tree "devices" can be used to read configuration from the device tree (and nothing else, really) 4. the device tree devices are accessed through struct device * in romstage only. device_t stays the typedef to int in romstage 5. Use the same static.c file in ramstage and romstage We declare structs as follows: ROMSTAGE_CONST struct bus dev_root_links[]; ROMSTAGE_CONST is const in romstage and empty in ramstage; This forces all of the device tree into the text area. So a struct looks like this: static ROMSTAGE_CONST struct device _dev21 = { #ifndef __PRE_RAM__ .ops = 0, #endif .bus = &_dev7_links[0], .path = {.type=DEVICE_PATH_PCI,{.pci={ .devfn = PCI_DEVFN(0x1c,3)}}}, .enabled = 0, .on_mainboard = 1, .subsystem_vendor = 0x1ae0, .subsystem_device = 0xc000, .link_list = NULL, .sibling = &_dev22, #ifndef __PRE_RAM__ .chip_ops = &southbridge_intel_bd82x6x_ops, #endif .chip_info = &southbridge_intel_bd82x6x_info_10, .next=&_dev22 }; Change-Id: I722454d8d3c40baf7df989f5a6891f6ba7db5727 Signed-off-by: Ronald G. Minnich <rminnich@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1398 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/include/device')
-rw-r--r--src/include/device/device.h35
-rw-r--r--src/include/device/pci.h3
-rw-r--r--src/include/device/resource.h3
3 files changed, 28 insertions, 13 deletions
diff --git a/src/include/device/device.h b/src/include/device/device.h
index 0b15ac5aed..b44a551d77 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -2,11 +2,12 @@
#define DEVICE_H
#include <stdint.h>
+#include <stddef.h>
#include <device/resource.h>
#include <device/path.h>
-
struct device;
+#ifndef __PRE_RAM__
typedef struct device * device_t;
struct pci_operations;
struct pci_bus_operations;
@@ -42,12 +43,14 @@ struct device_operations {
const struct smbus_bus_operations *ops_smbus_bus;
const struct pci_bus_operations *ops_pci_bus;
};
+#endif
struct bus {
- device_t dev; /* This bridge device */
- device_t children; /* devices behind this bridge */
- struct bus *next; /* The next bridge on this device */
+
+ ROMSTAGE_CONST struct device * dev; /* This bridge device */
+ ROMSTAGE_CONST struct device * children; /* devices behind this bridge */
+ ROMSTAGE_CONST struct bus *next; /* The next bridge on this device */
unsigned bridge_ctrl; /* Bridge control register */
unsigned char link_num; /* The index of this link */
uint16_t secondary; /* secondary bus number */
@@ -70,10 +73,12 @@ struct pci_irq_info {
};
struct device {
- struct bus * bus; /* bus this device is on, for bridge
+ ROMSTAGE_CONST struct bus * bus; /* bus this device is on, for bridge
* devices, it is the up stream bus */
- device_t sibling; /* next device on this bus */
- device_t next; /* chain of all devices */
+
+ ROMSTAGE_CONST struct device * sibling; /* next device on this bus */
+
+ ROMSTAGE_CONST struct device * next; /* chain of all devices */
struct device_path path;
unsigned vendor;
@@ -89,23 +94,24 @@ struct device {
u8 command;
/* Base registers for this device. I/O, MEM and Expansion ROM */
- struct resource *resource_list;
+ ROMSTAGE_CONST struct resource *resource_list;
/* links are (downstream) buses attached to the device, usually a leaf
* device with no children has 0 buses attached and a bridge has 1 bus
*/
- struct bus *link_list;
+ ROMSTAGE_CONST struct bus *link_list;
struct device_operations *ops;
const struct chip_operations *chip_ops;
- void *chip_info;
+ ROMSTAGE_CONST void *chip_info;
};
/**
* This is the root of the device tree. The device tree is defined in the
* static.c file and is generated by the config tool at compile time.
*/
-extern struct device dev_root;
+extern ROMSTAGE_CONST struct device dev_root;
+#ifndef __PRE_RAM__
extern struct device *all_devices; /* list of all devices */
extern struct resource *free_resources;
@@ -195,5 +201,10 @@ void fixed_mem_resource(device_t dev, unsigned long index,
void tolm_test(void *gp, struct device *dev, struct resource *new);
u32 find_pci_tolm(struct bus *bus);
-
+#else
+ROMSTAGE_CONST struct device * dev_find_slot (unsigned int bus,
+ unsigned int devfn);
+ROMSTAGE_CONST struct device * dev_find_slot_on_smbus (unsigned int bus,
+ unsigned int addr);
+#endif
#endif /* DEVICE_H */
diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index 51d52835fd..a215a2a028 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -16,9 +16,11 @@
#define PCI_H
#include <stdint.h>
+#include <stddef.h>
#include <device/pci_def.h>
#include <device/resource.h>
#include <device/device.h>
+#ifndef __PRE_RAM__
#include <device/pci_ops.h>
#include <device/pci_rom.h>
@@ -107,4 +109,5 @@ static inline const struct pci_bus_operations *ops_pci_bus(struct bus *bus)
unsigned mainboard_pci_subsystem_vendor_id(struct device *dev);
unsigned mainboard_pci_subsystem_device_id(struct device *dev);
+#endif
#endif /* PCI_H */
diff --git a/src/include/device/resource.h b/src/include/device/resource.h
index c28ada5242..ddedc2fd29 100644
--- a/src/include/device/resource.h
+++ b/src/include/device/resource.h
@@ -2,6 +2,7 @@
#define DEVICE_RESOURCE_H
#include <stdint.h>
+#include <stddef.h>
#define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */
@@ -72,7 +73,7 @@ struct resource {
resource_t base; /* Base address of the resource */
resource_t size; /* Size of the resource */
resource_t limit; /* Largest valid value base + size -1 */
- struct resource* next; /* Next resource in the list */
+ ROMSTAGE_CONST struct resource* next; /* Next resource in the list */
unsigned long flags; /* Descriptions of the kind of resource */
unsigned long index; /* Bus specific per device resource id */
unsigned char align; /* Required alignment (log 2) of the resource */