diff options
| author | Tracy Wu <tracy.wu@intel.corp-partner.google.com> | 2021-11-09 14:23:11 +0800 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2021-11-12 16:46:56 +0000 |
| commit | 4eb17f8e20aa832035945c15a90b0209b837ebae (patch) | |
| tree | 2df1e0a00ee6cd9c55e77989e2b77aa6ae1af3e2 /src/include/device | |
| parent | ff182cb237c994b4a2b39bc56fea7e3c2a5f62fb (diff) | |
soc/intel/common/block/pcie: Add ADL-P CPU PCIe Device IDs
List of changes:
1. Add PEG60/10/62 IDs (0x464d/0x460d/0x463d) into device/pci_ids.h
2. Add these new IDs into pcie_device_ids[] in pcie.c
BUG=b:205668996
TEST=Build and check fsp log to confirm the settings are set properly.
Signed-off-by: Tracy Wu <tracy.wu@intel.corp-partner.google.com>
Change-Id: Idc8a09b0579e1e6053ed2e35b7556a180a5f0088
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kane Chen <kane.chen@intel.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Diffstat (limited to 'src/include/device')
| -rw-r--r-- | src/include/device/pci_ids.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 1ed6ac9eda..c6ef12188f 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3332,6 +3332,10 @@ #define PCI_DEVICE_ID_INTEL_MCC_PCIE_RP6 0x4b3d #define PCI_DEVICE_ID_INTEL_MCC_PCIE_RP7 0x4b3e +#define PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP1 0x464d +#define PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP2 0x460d +#define PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP3 0x463d + #define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP1 0x51b8 #define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP2 0x51b9 #define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP3 0x51ba |