diff options
| author | Martin Roth <gaumless@gmail.com> | 2023-09-04 15:37:07 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-12-13 10:42:30 +0000 |
| commit | 3e25f85d68d10249473d422c4c19dc30ea55e8b0 (patch) | |
| tree | 0fb6767dfe8334c455ccd8d3dace51bf02664932 /src/include/device | |
| parent | 3933ed5e5a73898becc80dccc35a58a158f8899e (diff) | |
drivers/ipmi to lib: Fix misspellings & capitalization issues
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I926ec4c1c00339209ef656995031026935e52558
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77637
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/device')
| -rw-r--r-- | src/include/device/device.h | 2 | ||||
| -rw-r--r-- | src/include/device/dram/ddr2.h | 2 | ||||
| -rw-r--r-- | src/include/device/pci_def.h | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/include/device/device.h b/src/include/device/device.h index 113969ca1d..41ec528cbd 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -229,7 +229,7 @@ void mp_init_cpus(DEVTREE_CONST struct bus *cpu_bus); static inline void mp_cpu_bus_init(struct device *dev) { /* - * When no LAPIC device is specified in the devietree inside the CPU cluster device, + * When no LAPIC device is specified in the devicetree inside the CPU cluster device, * neither a LAPIC device nor the link/bus between the CPU cluster and the LAPIC device * will be present in the static device tree and the link_list struct element of the * CPU cluster device will be NULL. In this case add one link, so that the diff --git a/src/include/device/dram/ddr2.h b/src/include/device/dram/ddr2.h index 032d5ce4cc..f3605b289d 100644 --- a/src/include/device/dram/ddr2.h +++ b/src/include/device/dram/ddr2.h @@ -92,7 +92,7 @@ struct dimm_attr_ddr2_st { u8 rev; /* Supported CAS mask, bit 0 == CL0 .. bit7 == CL7 */ u8 cas_supported; - /* Maximum cloclk to data cycle times for various CAS. + /* Maximum clock to data cycle times for various CAS. * Fields 0 and 1 are unused. */ u32 cycle_time[8]; /* Maximum data access times for various CAS. diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h index 9ecd50ab2d..8b90163a1e 100644 --- a/src/include/device/pci_def.h +++ b/src/include/device/pci_def.h @@ -24,7 +24,7 @@ #define PCI_STATUS 0x06 /* 16 bits */ #define PCI_STATUS_CAP_LIST 0x10 /* Support Capability List */ -#define PCI_STATUS_66MHZ 0x20 /* Support 66 Mhz PCI 2.1 bus */ +#define PCI_STATUS_66MHZ 0x20 /* Support 66 MHz PCI 2.1 bus */ /* Support User Definable Features [obsolete] */ #define PCI_STATUS_UDF 0x40 #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */ |