diff options
| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2021-06-07 23:38:17 +0530 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-06-08 15:43:08 +0000 |
| commit | 3102fd0f8f1d70d5e25997f15374ff5e2b39957c (patch) | |
| tree | 0caba8be8078989131c3ed40fb93bcaf6fdbf263 /src/include/device | |
| parent | c07d2e5a9b8d9e5c9db183ae243b4a92dba67d95 (diff) | |
soc/intel: Add Alder Lake's GT device ID
Add Alder Lake specific graphics device ID. The document# 641765 lists
the id 0x46a8.
TEST=Verify boot on brya
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I6f36256505a3e07c6197079ea2013991e841401b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55256
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/device')
| -rw-r--r-- | src/include/device/pci_ids.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index eeb23aeea3..8276a3e1be 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3816,6 +3816,7 @@ #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_1 0x46b0 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_2 0x46a1 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_3 0x46a3 +#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_4 0x46a8 #define PCI_DEVICE_ID_INTEL_ADL_S_GT1 0x4680 #define PCI_DEVICE_ID_INTEL_ADL_M_GT1 0x46c0 |