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authorEric Biederman <ebiederm@xmission.com>2004-11-04 11:04:33 +0000
committerEric Biederman <ebiederm@xmission.com>2004-11-04 11:04:33 +0000
commit018d8dd60f2cc0c82faac0ee2657daa163dd43e7 (patch)
tree528de120d262a9df05ce8b6119f593c85fa6b809 /src/include/device
parent4403f6082372d069e3cabe0918d9af5f9c1dccf6 (diff)
- Update abuild.sh so it will rebuild successfull builds
- Move pci_set_method out of hardwaremain.c - Re-add debugging name field but only include the CONFIG_CHIP_NAME is enabled. All instances are now wrapped in CHIP_NAME - Many minor cleanups so most ports build. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include/device')
-rw-r--r--src/include/device/device.h9
-rw-r--r--src/include/device/pci_ops.h3
2 files changed, 10 insertions, 2 deletions
diff --git a/src/include/device/device.h b/src/include/device/device.h
index cd232c72c1..945cdaabe3 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -14,8 +14,17 @@ struct smbus_bus_operations;
/* Chip operations */
struct chip_operations {
void (*enable_dev)(struct device *dev);
+#if CONFIG_CHIP_NAME == 1
+ char *name;
+#endif
};
+#if CONFIG_CHIP_NAME == 1
+#define CHIP_NAME(X) .name = X,
+#else
+#define CHIP_NAME(X)
+#endif
+
struct device_operations {
void (*read_resources)(device_t dev);
void (*set_resources)(device_t dev);
diff --git a/src/include/device/pci_ops.h b/src/include/device/pci_ops.h
index 7f897370ec..49f263fe6c 100644
--- a/src/include/device/pci_ops.h
+++ b/src/include/device/pci_ops.h
@@ -3,6 +3,7 @@
#include <stdint.h>
#include <device/device.h>
+#include <arch/pci_ops.h>
uint8_t pci_read_config8(device_t dev, unsigned where);
uint16_t pci_read_config16(device_t dev, unsigned where);
@@ -11,6 +12,4 @@ void pci_write_config8(device_t dev, unsigned where, uint8_t val);
void pci_write_config16(device_t dev, unsigned where, uint16_t val);
void pci_write_config32(device_t dev, unsigned where, uint32_t val);
-void pci_set_method(void);
-
#endif /* PCI_OPS_H */