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authorGabe Black <gabeblack@google.com>2013-06-30 05:19:53 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-10 23:20:55 +0200
commitd686acd1a358518e8f37452c0e826a3ac381cbe2 (patch)
tree4ddaef5f4e1ccef01a5016ae6e86c9932f73fcbf /src/include/device/pci_ops.h
parent0570286849b856aff304f5b6cb50c29cde5f1308 (diff)
pit: Redo the display port bridge initialization code.
The display port bridge on pit is different from the one on snow and needs to be initialized differently. Instead of waiting for the chip to come up on its own and assert the hotplug detect, we need to access it over i2c and get it up and running ourselves. Change-Id: I4bc911cb8e4463edff7beabd2f356cb70ae9f507 Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3723 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/include/device/pci_ops.h')
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