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authorKrishna Prasad Bhat <krishna.p.bhat.d@intel.com>2022-01-07 16:39:53 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-01-18 16:14:47 +0000
commit9a14fab340b4c8e0afd8bf04746f51ea189fdf5f (patch)
tree4c5d07d1cd4ad77418503469cedaed86ccca9f0e /src/include/device/pci_ids.h
parent0fd734046a131ec5433573eb79127d9ea9d6d66e (diff)
mb/intel/adlrvp_n: Configure EC in RW GPIO
EC_IN_RW signal from EC GPIO is connected to GPIO E7 of SOC. This GPIO can be used to check EC status trusted (LOW: in RO) or untrusted (HIGH: in RW). BRANCH=None BUG=None TEST=Issue manual recovery and confirm DUT is entering recovery mode. Change-Id: Ib8b6be9fcda24bd2bb479b5b6c01f24a6e9c7b1f Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60896 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Diffstat (limited to 'src/include/device/pci_ids.h')
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