diff options
author | Neil Chen <neilc@nvidia.com> | 2014-12-18 16:49:33 +0800 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-04-15 16:41:50 +0200 |
commit | 7f00962e70c57b0fc6faf50b8fbf26f95b96e6d2 (patch) | |
tree | a6cc199396cf48f0a4b3f5a225e51478eabd388f /src/include/device/pci_ids.h | |
parent | 908ceefd25ffd6427c3a53502598006bacf22750 (diff) |
blaze: add new Micron 2GB BCT
This BCT table is the same as "ramcode == 1", and has been pass the stress
test with this new Micron type.
-Micron MT41K256M16LY-107:N, ramcode = 4
BUG=chrome-os-partner:32071
TEST=emerged coreboot, booted successfully into kernel.
Change-Id: I80990fec6faf5dd2b8090658d865cc8dde31b753
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: bce2bf1fd518077e06d70d78a65d58ddef7b7bc6
Original-Change-Id: I2c0b28fdafb5299784519e641aa4edb53d0c36b2
Original-Signed-off-by: Neil Chen <neilc@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/236514
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/9636
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/include/device/pci_ids.h')
0 files changed, 0 insertions, 0 deletions