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authorMaxim Polyakov <max.senia.poliak@gmail.com>2024-08-10 11:45:34 +0300
committerFelix Held <felix-coreboot@felixheld.de>2024-09-11 13:40:48 +0000
commit337b6f394f39470c82b0703e82d1536d9541e20d (patch)
tree7627a32ee389866e54d070e11e9bbda51255d182 /src/include/device/pci_ids.h
parent2b0459217546b0caa74665b80daadd49348fe7b7 (diff)
soc/intel/cml, pci_ids: Remove IDs of non-existent graphics devices
These identifiers are not included in the GPU list from Intel [1]. At the same time, 0x9B44 is not PCI DID of graphics device at all: 8086:9B44 - 10th Gen Core Processor Host Bridge/DRAM Registers [2]. [1] https://web.archive.org/web/20240731152818/https:// dgpu-docs.intel.com/devices/hardware-table.html [2] https://web.archive.org/web/20231004011832/https://devicehunt.com/ view/type/pci/vendor/8086/device/9B44 Change-Id: I8ff7b062f930cb63ffd9caf240874742bd53fc23 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83862 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/include/device/pci_ids.h')
-rw-r--r--src/include/device/pci_ids.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 43533a6e44..530805206f 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -4185,12 +4185,8 @@
#define PCI_DID_INTEL_CML_GT2_ULX_1 0x9B40
#define PCI_DID_INTEL_CML_GT1_S_1 0x9BA5
#define PCI_DID_INTEL_CML_GT1_S_2 0x9BA8
-#define PCI_DID_INTEL_CML_GT2_S_1 0x9B45
-#define PCI_DID_INTEL_CML_GT2_S_2 0x9B48
#define PCI_DID_INTEL_CML_GT1_H_1 0x9BA4
#define PCI_DID_INTEL_CML_GT1_H_2 0x9BA2
-#define PCI_DID_INTEL_CML_GT2_H_1 0x9B44
-#define PCI_DID_INTEL_CML_GT2_H_2 0x9B42
#define PCI_DID_INTEL_CML_GT2_S_G0 0x9BC8
#define PCI_DID_INTEL_CML_GT2_S_P0 0x9BC5
#define PCI_DID_INTEL_CML_GT2_H_R0 0x9BC2