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authorli feng <li1.feng@intel.com>2020-03-12 11:37:13 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-03-16 14:47:15 +0000
commitdb992acb73611285ac433d9c7cdf09480be17b54 (patch)
treef5dd615eb2397a58d6356feb07bd6fc301496ed6 /src/include/device/hypertransport.h
parent2cf9d3883cc09aa2410135b87d715f47608ae38d (diff)
drivers/intel/ish: Add TGL ISH PCI id
BRANCH=none BUG=b:145946347 TEST==boot to OS with TGL RVP UP3 Signed-off-by: Hu, Hebo <hebo.hu@intel.com> Signed-off-by: li feng <li1.feng@intel.com> Change-Id: I3a4f73e82f62def3adb2cb1332a315366078c918 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39478 Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/device/hypertransport.h')
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