summaryrefslogtreecommitdiff
path: root/src/include/cpu
diff options
context:
space:
mode:
authorYuchi Chen <yuchi.chen@intel.com>2024-06-25 10:50:18 +0800
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2024-08-06 16:47:48 +0000
commitf61c136f8ab66e550bef0f6dda66fd2656608adb (patch)
tree5af95d6a7dc482ff1b70793a884173a57ee8bff2 /src/include/cpu
parent377b13335914c5d3a23ddfb8a8b600cd1f260ea9 (diff)
soc/intel/common: Add CPU and PCIe IDs for Snow Ridge platform
CPU and PCIe IDs are from Intel Atom Processor C5100, C5300, P5300 and P5700 Product Families EDS, doc No. 575160 rev 2.0. Change-Id: I3f5d612765bbe9adffe0b6c7a4151f32b33e88b4 Signed-off-by: Yuchi Chen <yuchi.chen@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83314 Reviewed-by: Shuo Liu <shuo.liu@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/cpu')
-rw-r--r--src/include/cpu/intel/cpu_ids.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h
index ae58110e0e..ad66025d5f 100644
--- a/src/include/cpu/intel/cpu_ids.h
+++ b/src/include/cpu/intel/cpu_ids.h
@@ -83,5 +83,12 @@
#define CPUID_LUNARLAKE_A0_1 0xb06d0
#define CPUID_LUNARLAKE_A0_2 0xb06d1
#define CPUID_PANTHERLAKE_A0 0xc06c0
+#define CPUID_SNOWRIDGE_A0 0x80660
+#define CPUID_SNOWRIDGE_A1 0x80661
+#define CPUID_SNOWRIDGE_A2 0x80662
+#define CPUID_SNOWRIDGE_A3 0x80663
+#define CPUID_SNOWRIDGE_B0 0x80664
+#define CPUID_SNOWRIDGE_B1 0x80665
+#define CPUID_SNOWRIDGE_C0 0x80667
#endif /* CPU_INTEL_CPU_IDS_H */