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authorArthur Heymans <arthur@aheymans.xyz>2019-11-25 09:56:20 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-06-22 13:14:53 +0000
commit99a48bc824d6524a780a987e8e22cf22bdb9eae1 (patch)
treeb530e25498a8420e1c5f412a07c50957e9d405bf /src/include/cpu
parent64c9c6d54c2bfc4b3d7c9058f2a80a56b58a9a4f (diff)
soc/intel/common/cache_as_ram.S: Add macro to clear CAR
Add a macro to clear CAR which is replicated 3 times in this code. TEST: with BUILD_TIMELESS=1 the resulting binary is identical. Change-Id: Iec28e3f393c4fe222bfb0d5358f815691ec199ae Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37191 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/include/cpu')
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