- Renamed cpu header files

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1659 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 48 insertions, 0 deletions

diff --git a/src/include/cpu/x86/cache.h b/src/include/cpu/x86/cache.h
new file mode 100644
index 0000000000..623ef971ce
--- /dev/null
+++ b/src/include/cpu/x86/cache.h
@@ -0,0 +1,48 @@
+#ifndef CPU_X86_CACHE
+#define CPU_X86_CACHE
+
+static inline unsigned long read_cr0(void)
+{
+	unsigned long cr0;
+	asm volatile ("movl %%cr0, %0" : "=r" (cr0));
+	return cr0;
+}
+
+static inline void write_cr0(unsigned long cr0)
+{
+	asm volatile ("movl %0, %%cr0" : : "r" (cr0));
+}
+
+static inline void invd(void)
+{
+	asm volatile("invd" ::: "memory");
+}
+static inline void wbinvd(void)
+{
+	asm volatile ("wbinvd");
+}
+
+static inline void enable_cache(void)
+{
+	unsigned long cr0;
+	cr0 = read_cr0();
+	cr0 &= 0x9fffffff;
+	write_cr0(cr0);
+}
+
+static inline void disable_cache(void)
+{
+	/* Disable and write back the cache */
+	unsigned long cr0;
+	cr0 = read_cr0();
+	cr0 |= 0x40000000;
+	wbinvd();
+	write_cr0(cr0);
+	wbinvd();
+}
+
+#ifndef __ROMCC__
+void x86_enable_cache(void);
+#endif /* !__ROMCC__ */
+
+#endif /* CPU_X86_CACHE */