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author | Michael Niewöhner <foss@mniewoehner.de> | 2021-01-01 21:04:37 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-07 08:15:04 +0000 |
commit | 6b284569a80f904ed7b813e302ff968bd344c40b (patch) | |
tree | 8eebe7a02522c598e67d18da0e37c61dd34a36d6 /src/include/cpu/intel | |
parent | 41a36a3d3ed26a540cacaa0aa39aa7e11a163760 (diff) |
cpu/intel: add PC10 residency counter MSR
This MSR will be used in the follow-up changes.
Change-Id: Ia6f74861502d4a9f872b2bbbab2e5f1925a14c4d
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49044
Reviewed-by: Lance Zhao
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/cpu/intel')
-rw-r--r-- | src/include/cpu/intel/msr.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/include/cpu/intel/msr.h b/src/include/cpu/intel/msr.h index da0f0bb68d..935ac30096 100644 --- a/src/include/cpu/intel/msr.h +++ b/src/include/cpu/intel/msr.h @@ -14,4 +14,6 @@ #define MSR_PLATFORM_INFO 0xce +#define MSR_PKG_C10_RESIDENCY 0x632 + #endif /* CPU_INTEL_MSR_H */ |