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| author | Zheng Bao <zheng.bao@amd.com> | 2020-05-29 23:10:12 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-06-02 18:55:01 +0000 |
| commit | 695d86243e7d2291b670d12b61446bd50708377e (patch) | |
| tree | b944b78d4c815f17799420d43828fb8f424ad3ae /src/include/cpu/intel/l2_cache.h | |
| parent | 12e9bd439431256666075abce69f58db02f12449 (diff) | |
amd/microcode: Change equivalant ID width to 16bit
The definition of processor_rev_id in struct microcode
is 16 bits. So we need to change the a series of parameters
passing to 16 bits.
Change-Id: Iacabee7e571bd37f3aca106d515d755969daf8f3
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41869
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/include/cpu/intel/l2_cache.h')
0 files changed, 0 insertions, 0 deletions