diff options
| author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-07 11:44:05 -0800 |
|---|---|---|
| committer | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-09 17:16:35 +0100 |
| commit | e0f5dfc6785c53217c0d97331b3ada46a51cc016 (patch) | |
| tree | b1315ae178d608bfccb701747bfa121e3223d68a /src/include/cpu/amd | |
| parent | 0ca2a0654ca4b403e8a54d558bce07a862820a9d (diff) | |
src/include: Move trailing statements to next line
Fix the following error detected by checkpatch.pl:
ERROR: trailing statements should be on next line
TEST=Build and run on Galileo Gen2
Change-Id: I169f520db6f62dfea50d2bb8fb69a8e8257f86c7
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18643
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/include/cpu/amd')
| -rw-r--r-- | src/include/cpu/amd/model_fxx_rev.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/include/cpu/amd/model_fxx_rev.h b/src/include/cpu/amd/model_fxx_rev.h index 4a217b2668..6bb8b43c1c 100644 --- a/src/include/cpu/amd/model_fxx_rev.h +++ b/src/include/cpu/amd/model_fxx_rev.h @@ -73,7 +73,8 @@ static inline int is_e0_later_in_bsp(int nodeid) if (IS_ENABLED(CONFIG_K8_REV_F_SUPPORT)) return 1; - if (nodeid == 0) { // we don't need to do that for node 0 in core0/node0 + // we don't need to do that for node 0 in core0/node0 + if (nodeid == 0) { return !is_cpu_pre_e0(); } @@ -87,7 +88,8 @@ static inline int is_e0_later_in_bsp(int nodeid) val = pci_read_config32(dev, 0x80); e0_later = !!(val & (1<<3)); - if (e0_later) { // pre_e0 bit 3 always be 0 and can not be changed + // pre_e0 bit 3 always be 0 and can not be changed + if (e0_later) { pci_write_config32(dev, 0x80, val_old); // restore it } |