diff options
| author | Ronald G. Minnich <rminnich@gmail.com> | 2006-07-21 19:21:38 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2006-07-21 19:21:38 +0000 |
| commit | da7ee9fa07b4eaebd6e16faa678d814d9ba03ef1 (patch) | |
| tree | c86847785bdcd547d0121314f6021c4dc5482f26 /src/include/cpu/amd/gx2def.h | |
| parent | 35befb75ead1b4bc34ef351bec2a411a3ee70519 (diff) | |
These changes incorporate steve goodrich'es fixes, and one bug that is
disabled.
cs5536: add new entires for SB control etc.
cs5536.c: chip_enabled function moved to chip_init, so it only gets run
once.
IRQ setup improved
gx2def.h: new defines added
vr.h: new file, with new def's for virtual register control.
mainboard config.lb: new entries added for nb and sb control.
chipsetinit.c: new controls added -- I forget all the details :-)
grphinit.c: new function added
northbridge.c: new IRQ control added. FlashChipSetup added, controlled
by chip info setupflash struct member. Currently, if enabled, this hangs
OLPC in linux PCI scan.
chip.h: new struct members added for unwanted device enable, flash setup
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2345 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include/cpu/amd/gx2def.h')
| -rw-r--r-- | src/include/cpu/amd/gx2def.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/src/include/cpu/amd/gx2def.h b/src/include/cpu/amd/gx2def.h index fd466afe48..8e64659120 100644 --- a/src/include/cpu/amd/gx2def.h +++ b/src/include/cpu/amd/gx2def.h @@ -1097,4 +1097,34 @@ #define PM_AWKD ( PMLogic_BASE + 0x50) #define PM_SSC ( PMLogic_BASE + 0x54) + +/* FLASH device macros */ +#define FLASH_TYPE_NONE 0 /* No flash device installed */ +#define FLASH_TYPE_NAND 1 /* NAND device */ +#define FLASH_TYPE_NOR 2 /* NOR device */ + +#define FLASH_IF_MEM 1 /* Memory or memory-mapped I/O interface for Flash device */ +#define FLASH_IF_IO 2 /* I/O interface for Flash device */ + +/* Flash Memory Mask values */ +#define FLASH_MEM_DEFAULT 0x00000000 +#define FLASH_MEM_4K 0xFFFFF000 +#define FLASH_MEM_8K 0xFFFFE000 +#define FLASH_MEM_16K 0xFFFFC000 +#define FLASH_MEM_128K 0xFFFE0000 +#define FLASH_MEM_512K 0xFFFC0000 +#define FLASH_MEM_4M 0xFFC00000 +#define FLASH_MEM_8M 0xFF800000 +#define FLASH_MEM_16M 0xFF000000 + +/* Flash IO Mask values */ +#define FLASH_IO_DEFAULT 0x00000000 +#define FLASH_IO_16B 0x0000FFF0 +#define FLASH_IO_32B 0x0000FFE0 +#define FLASH_IO_64B 0x0000FFC0 +#define FLASH_IO_128B 0x0000FF80 +#define FLASH_IO_256B 0x0000FF00 + + + #endif /* CPU_AMD_GX2DEF_H */ |