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authorPratikkumar Prajapati <pratikkumar.v.prajapati@intel.com>2023-10-05 13:12:12 -0700
committerSubrata Banik <subratabanik@google.com>2023-12-20 04:29:12 +0000
commit4db921317fe1eec77e93b3c1628dac14fd812d39 (patch)
treee039c66e4713a6874640ef7f79c605a89180b3e9 /src/include/console/cbmem_console.h
parent9b3c5afc00ebbc22c0d5b400bfb8ed8946fe67d1 (diff)
soc/intel/common,mtl: Refactor BERT generation flow for crashlog
With earlier flow, a chunk of CBMEM region was allocated for each SRAM e.g., PUNIT SRAM, SOC PMC SRAM and IOE PMC SRAM. Then entire SRAM content was copied to dedicated CBMEM region. Later in acpi_bert.c, the BERT table was getting created for each chunk of CBMEM. This flow was not considering creating separate entries for each region of crashlog records. It resulted in only the first entry getting decoded from each SRAM. New flow aims to fix this issue. With new flow, a simple singly linked list is created to store each region of crashlog records from all SRAMs. The crashlog data is not copied to CBMEM. The nodes are allocated dynamically and then copied to ACPI BERT table and then freed. This flow also makes the overall crashlog code much simpler. BUG=b:298234592 TEST=With this change decoding crashlog show comprehensive details, tested on REX. Change-Id: I43bb61485b77d786647900ca284b7f492f412aee Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78257 Reviewed-by: Kapil Porwal <kapilporwal@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/console/cbmem_console.h')
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