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authorJagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>2016-07-11 00:45:10 -0700
committerAaron Durbin <adurbin@chromium.org>2016-07-13 19:58:12 +0200
commitd41a338d55ec97bd5c9aa92ecb7dc163ff83dcd2 (patch)
tree324c6d938c3a38a013a2594178a52623a4778fd3 /src/include/bootblock_common.h
parentb6fc727903775b6a100d8cf02cb53ac22fae49d9 (diff)
intel/amenia: Disable unused PCIe ports
Disable PCIe A0, A1, A2, A3, B1 ports. Enable B0 port which is used for wifi. BUG=chrome-os-partner:54288 BRANCH=None TEST=lspci should show only PCIe B0 device Change-Id: I266d6eb7ddd56888f6b07b59681c2d9f0a6c0a9e Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com> Reviewed-on: https://review.coreboot.org/15599 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include/bootblock_common.h')
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