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authorrobbie zhang <robbie.zhang@intel.com>2015-10-01 16:06:47 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-10-27 15:15:09 +0100
commit246115eb01fff9f97d7932b7349be92ca86b4feb (patch)
treec779361e5b956d881bb694000e1d4373596a20aa /src/include/boot
parent2003844378e71194cb2fe5d6ee6d92a6293cb3a2 (diff)
coreboot: make lb_framebuffer a weak function
This is to support other gfx enable method such as Gfx Peim (AKA GOP) for Intel soc. BRANCH=none BUG=chrome-os-partner:44559 TEST=Built and boot on kunimitsu/glados. Change-Id: Ib8010ea6901ea906a8b4129807b94ace71ef1165 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: ad26a99560009c487070cccf6ab132188b9e247d Original-Change-Id: Id132718a8bcec5446cc4c0d9d636d26e8a99bb15 Original-Signed-off-by: robbie zhang <robbie.zhang@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/303801 Original-Commit-Ready: Robbie Zhang <robbie.zhang@intel.com> Original-Tested-by: Robbie Zhang <robbie.zhang@intel.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/12140 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/include/boot')
-rw-r--r--src/include/boot/coreboot_tables.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h
index b190a2d9c0..ff942f1be1 100644
--- a/src/include/boot/coreboot_tables.h
+++ b/src/include/boot/coreboot_tables.h
@@ -19,6 +19,9 @@ void lb_add_console(uint16_t consoletype, void *data);
/* Define this in mainboard.c to add board-specific table entries. */
void lb_board(struct lb_header *header);
+/* Define this in soc or fsp driver to add specific table entries. */
+void lb_framebuffer(struct lb_header *header);
+
/*
* Function to retrieve MAC address(es) from the VPD and store them in the
* coreboot table.