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authorEric Lai <eric_lai@quanta.corp-partner.google.com>2022-04-14 15:22:52 +0800
committerSubrata Banik <subratabanik@google.com>2022-04-20 06:57:21 +0000
commit3067701108216cf5eb41198922a6050d6c662f11 (patch)
tree5286e5180bc7e4443c7ef10783d8c5c0b56ee345 /src/include/base3.h
parentd083317fae30b01fd855cf24d81203aa2d6dec3c (diff)
lib: Check for non-existent DIMMs in check_if_dimm_changed
Treat dimm addr_map 0 non-existent. addr_map default is 0, we don't set it if Hw is not present. Also change the test case default to avoid 0. SODIMM SMbus address 0x50 to 0x53 is commonly used. BUG=b:213964936 BRANCH=firmware-brya-14505.B TEST=emerge-brya coreboot chromeos-bootimage The MRC training does not be performed again after rebooting. Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Change-Id: I2ada0109eb0805174cb85d4ce373e2a3ab7dbcac Reviewed-on: https://review.coreboot.org/c/coreboot/+/63628 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/include/base3.h')
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