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authorJason Glenesk <jason.glenesk@amd.corp-partner.google.com>2021-04-22 05:00:32 -0700
committerPatrick Georgi <pgeorgi@google.com>2021-04-26 08:28:22 +0000
commit250e610fa082473b3592d06c69316ec1daa88116 (patch)
treeecdded88b81b30c251520b9983ab4abc1df1fabb /src/include/assert.h
parentb1e8a8a6cee3e67962ecb03afd84aabb391ff9a8 (diff)
vc/amd/fsp/cezanne:Add s0i_enable upd control
Add upd to enable S0i3 in fsp. BUG=b:178728116 TEST=Build and boot to OS in Guybrush. Enter S0i3 after passing the sleep state configuration from the mainboard. Cq-Depend: chrome-internal:3777391 Change-Id: I01759caa4d72e284b2b960634f89c6a2ab1dad57 Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52603 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/include/assert.h')
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