diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-01-12 01:13:08 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-15 11:24:32 +0000 |
commit | 0a7d99c089eea04ec03958f96dd180bffa6fcc4a (patch) | |
tree | 2e322a669f520939bd4ad39184896342d46f18da /src/include/assert.h | |
parent | 89200d27868f68a32e09f5a4a3c264bf45b78e20 (diff) |
nb/intel/sandybridge: Fix handling of clock timing
Clock is a differential signal and propagates faster than command and
control, therefore its timing needs to be offset with `pi_code_offset`.
It is also a periodic signal, so it can safely wrap around.
To avoid potential undefined behavior, make `clk_delay` signed. It makes
no difference with valid values, because the initial value can be proven
to never be negative and `pi_code_offset` is always positive. With this
change, it is possible to add an underflow check, for additional sanity.
Change-Id: I375adf84142079f341b060fba5e79ce4dcb002be
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49319
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/include/assert.h')
0 files changed, 0 insertions, 0 deletions