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authorHarsha B R <harsha.b.r@intel.com>2023-01-03 14:03:39 +0530
committerSridhar Siricilla <sridhar.siricilla@intel.com>2023-01-04 10:58:06 +0000
commitaf6cd3f0b44a39bb6387c8218e5872afb74fcc3f (patch)
tree033a3e7498140fa87eb7c59dd8e9db57dc4039d7 /src/include/acpi/acpi_sata.h
parentd2ebc4d39fa1a99f3582f9e38869ef443cd9d3fb (diff)
mb/intel/mtlrvp: Enable CSE Lite SKU for MTL-RVP
This patch will enable Kconfig SOC_INTEL_CSE_LITE_SKU option required to enable CSE-Lite SKU for MTL-RVP. On enabling the respective Kconfig option, CSE reboots the system into CSE_RW FW region on cold reboot. BUG=b:224325352 TEST=Able to boot intel/mtlrvp to ChromeOS and also able to observe CSE boot to RW FW region as part of coreboot console log, localhost ~ # cbmem -c | grep cse [DEBUG] cse_lite: Number of partitions = 3 [DEBUG] cse_lite: Current partition = RW [DEBUG] cse_lite: Next partition = RW Signed-off-by: Harsha B R <harsha.b.r@intel.com> Change-Id: I325405cc304d245871396317c11ac7a5b062a5bd Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71638 Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/acpi/acpi_sata.h')
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