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author | Raul E Rangel <rrangel@chromium.org> | 2021-05-21 17:04:28 -0600 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-05-30 20:28:41 +0000 |
commit | 43aa527eecbf272e179a09b0c3313636b0e6e19c (patch) | |
tree | 7c78f66d6824217c65eabd2bbc3f6321ab17f611 /src/ec | |
parent | 203698a4cb9101e9c649c990579a197c6693e2a0 (diff) |
soc/amd/common/block/espi: Explicitly assert PLTRST#
PLTRST# is currently asserted and latched when eSPI_RST# gets asserted.
If eSPI_RST# isn't used on a platform or it doesn't properly assert
in all cases, then PLTRST# will never be asserted. This could result in
the AP and EC being out of sync.
BUG=b:188188172, b:188935533
TEST=Warm reset guybrush with partial #22 rework. Verify that peripheral
channel is correctly reset.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I20d12edf3efc6100096e24aa8d1aec76bbde264f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54884
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Diffstat (limited to 'src/ec')
0 files changed, 0 insertions, 0 deletions