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author | Arthur Heymans <arthur@aheymans.xyz> | 2023-07-13 18:32:40 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-11-30 15:18:45 +0000 |
commit | ea2e210548c2267b1dab0ea5aba15c448bfd93fc (patch) | |
tree | d6d6b004e57f231571c04f992701d80bcf915fbb /src/ec/starlabs/merlin/Makefile.inc | |
parent | 98a46fb2dd2319b5971b57b345e0dddcf5c6880f (diff) |
soc/amd/genoa: Implement romstage
The only thing romstage needs to do is find cbmem_top.
TESTED: reaches ramstage.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: Ic2837c4a2b0ec8dcd9dd99602f9c073999c36139
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76514
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Diffstat (limited to 'src/ec/starlabs/merlin/Makefile.inc')
0 files changed, 0 insertions, 0 deletions