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author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2021-08-24 11:45:39 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-11 12:48:55 +0000 |
commit | 6deadeeeca7931807b2fc915d7ea263606f1a1e1 (patch) | |
tree | c6d5e5cebf1c4d4812d77b07fddd2c5d8fc4456b /src/ec/starlabs/it8987/ec.h | |
parent | 5cb62f1aa3ff6a96592152add83f9c52cc42f4b8 (diff) |
mb/siemens/mc_ehl2: Disable SATA Port 0
This mainboard has only SATA Port 1 available with no device sleep
feature.
Change-Id: I338833f2f9bcb407599cfc676ead0b8a9d7379bd
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58167
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/ec/starlabs/it8987/ec.h')
0 files changed, 0 insertions, 0 deletions