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authorSubrata Banik <subrata.banik@intel.com>2020-10-05 21:04:22 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-10-08 04:10:37 +0000
commitefc40090f5711ea53df086606bf20ea8f476f871 (patch)
tree5aa8ac61484260a5544ebb88d60d093671dac34f /src/ec/roda/it8518/Kconfig
parent58222d156a2609bdc3e78222c9bf03a0697d6c2a (diff)
mb/intel/adlrvp: Add initial ADL-P mainboard code
List of changes: 1. Initial code block to select SOC_INTEL_ALDERLAKE Kconfig 2. Add minimum code to make ADL-P RVP build successfully 3. Mainly bootblock and verstage code added to reach till verstage 4. Add support for 2 mainboards as ADL-P board with default EC (Windows SKU) and Chrome EC (Chrome SKU) 5. Add empty dsdt.asl to avoid compilation error TEST=Able to build and boot ADL-P RVP till romstage early. Change-Id: I2b551f48a4eb4d621d9a86c5d189c517d5610069 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46054 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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