ec/kontron/kempld: Add minimal GPIO driver

The patch adds an interface for configuring GPIOs inside the Kontron
CPLD/EC. This allows to statically define the mode for each GPIO pin
in devicetree.cb of the motherboard or carrier board. For example:

chip ec/kontron/kempld
	device gpio 0 on
		register "gpio[0]"  = "KEMPLD_GPIO_INPUT"
		register "gpio[4]"  = "KEMPLD_GPIO_OUTPUT_LOW"
		register "gpio[5]"  = "KEMPLD_GPIO_OUTPUT_HIGH"
		register "gpio[11]" = "KEMPLD_GPIO_DEFAULT"
	end
end

In this case, <device gpio 0>, like all other devices, is not a real
device inside the EC. These definitions are used to understand the EC
resources and systematize configuration options, but if mark this as
<off>, the initialization step will be skipped in the driver code.

Use KEMPLD_GPIO_DEFAULT or skip it in devicetree.cb to not configure
the GPIO and keep the default mode after CPLD reset.

This work is based on code from the drivers/gpio/gpio-kempld.c linux
driver. Tested on Kontron mAL-10 COMe module [1].

[1] CB:54380 , Change-Id: I7d354aa32ac8c64f54b2bcbdb4f1b8915f55264e

Change-Id: Id767aa451fbf2ca1c0dccfc9aa2c024c6f37c1bb
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47595
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 71 insertions, 0 deletions

diff --git a/src/ec/kontron/kempld/kempld_gpio.c b/src/ec/kontron/kempld/kempld_gpio.c
new file mode 100644
index 0000000000..8699c1f477
--- /dev/null
+++ b/src/ec/kontron/kempld/kempld_gpio.c
@@ -0,0 +1,71 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <stdint.h>
+#include <arch/io.h>
+#include <delay.h>
+#include "chip.h"
+#include "kempld.h"
+#include "kempld_internal.h"
+
+enum kempld_gpio_direction {
+	KEMPLD_GPIO_DIR_IN  = 0,
+	KEMPLD_GPIO_DIR_OUT = 1
+};
+
+static void kempld_gpio_value_set(u8 pin_num, u8 value)
+{
+	const u8 mask = KEMPLD_GPIO_MASK(pin_num);
+	u8 reg_val = kempld_read8(KEMPLD_GPIO_LVL(pin_num));
+	reg_val = value ? reg_val | mask : reg_val & ~mask;
+	kempld_write8(KEMPLD_GPIO_LVL(pin_num), reg_val);
+}
+
+static void kempld_gpio_direction_set(u8 pin_num, enum kempld_gpio_direction dir)
+{
+	const u8 mask = KEMPLD_GPIO_MASK(pin_num);
+	u8 reg_val = kempld_read8(KEMPLD_GPIO_DIR(pin_num));
+	reg_val = dir == KEMPLD_GPIO_DIR_OUT ? reg_val | mask : reg_val & ~mask;
+	kempld_write8(KEMPLD_GPIO_DIR(pin_num), reg_val);
+}
+
+static int kempld_configure_gpio(u8 pin_num, enum kempld_gpio_mode mode)
+{
+	if (kempld_get_mutex(100) < 0)
+		return -1;
+
+	switch (mode) {
+	case KEMPLD_GPIO_DEFAULT:
+		break;
+
+	case KEMPLD_GPIO_INPUT:
+		kempld_gpio_direction_set(pin_num, KEMPLD_GPIO_DIR_IN);
+		break;
+
+	case KEMPLD_GPIO_OUTPUT_LOW:
+		kempld_gpio_value_set(pin_num, 0);
+		kempld_gpio_direction_set(pin_num, KEMPLD_GPIO_DIR_OUT);
+		break;
+
+	case KEMPLD_GPIO_OUTPUT_HIGH:
+		kempld_gpio_value_set(pin_num, 1);
+		kempld_gpio_direction_set(pin_num, KEMPLD_GPIO_DIR_OUT);
+		break;
+	}
+
+	kempld_release_mutex();
+	return 0;
+}
+
+int kempld_gpio_pads_config(struct device *dev)
+{
+	const struct ec_kontron_kempld_config *config = dev->chip_info;
+
+	if (!config)
+		return -1;
+
+	for (u8 i = 0; i < KEMPLD_NUM_GPIOS; ++i) {
+		if (kempld_configure_gpio(i, config->gpio[i]) < 0)
+			return -1;
+	}
+	return 0;
+}